High-mobility semiconductors, such as germanium and compound semiconductors (e.g., III-V compound semiconductors) may be desirable to use in the fabrication of semiconductor devices because of their relatively high electron and/or hole mobility. Devices formed with high-mobility semiconductor material may theoretically exhibit better performance, faster speeds, reduced power consumption, and have higher breakdown fields compared to similar devices formed with a lower-mobility semiconductor, such as silicon.
High-mobility semiconductor materials may be used, for example, to fabricate metal oxide field effect (MOSFET) devices. A typical MOSFET device includes a source region, a drain region, and a channel region, each formed of semiconductor material. The MOSFET also includes a dielectric material (gate dielectric) and conductive material (e.g., metal) overlying the channel region. The dielectric material and conductive material are formed by depositing the respective materials using vacuum or gas-phase deposition techniques, such as chemical vapor deposition, plasma-enhanced chemical vapor deposition, atomic layer deposition, physical vapor deposition, or the like.
Unfortunately, the interface between the channel region of the device, formed of high-mobility semiconductor materials such as germanium or III-V semiconductor materials, and the gate dielectric (e.g., high dielectric constant (k) materials) typically includes a large interface trap density (Dit). The high Dit values are thought to result from vacancies and dangling bonds at the surface of the high-mobility semiconductor material, and the high Dit values deleteriously affect the performance of devices formed with the high-mobility materials and have been a technical challenge to the development of complementary metal oxide semiconductor (CMOS) devices using such high-mobility semiconductor materials.
Various approaches to passivate a high mobility semiconductor surface prior to dielectric deposition, in order to achieve reduced interface trap densities, have been tried. For example, III-V semiconductor materials passivated with sulfur by immersing the materials in wet chemical (NH4)2S solutions have shown improved interface properties, resulting in improved device performance. However, the immersion based passivation process is difficult to integrate into a vacuum or gas-phase deposition system used for subsequent dielectric material deposition. Consequently, there is an undesired air exposure time following sulfur passivation using wet chemical solution techniques and prior to the subsequent deposition of the dielectric material. This air exposure can severely affect the device performance, since the passivation layer cannot fully prevent oxide regrowth during this exposure, and oxide growth on germanium and III-V semiconductor surfaces generally increases Dit. Additionally, performing solution-based passivation at elevated temperatures (e.g., >100° C.) is problematic; thus, the reactivity of (NH4)2S is limited.
Accordingly, improved methods and systems for passivating a surface of high-mobility semiconductor materials and devices formed using the methods and systems are desired.